| Circuit-level techniques to control gate leakage for sub-100nm CMOS.doc |
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| Circuit-level techniques to control gate leakage for sub-100nm CMOS.pdf |
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| Circuit-level techniques to control gate leakage for sub-100nm CMOS.ppt |
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| Circuit-level techniques to control gate leakage for sub-100nm CMOS.txt |
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| Circuit-level techniques to control gate leakage for sub-100nm CMOS.lit |
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| Circuit-level techniques to control gate leakage for sub-100nm CMOS.prc |
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| Circuit-level techniques to control gate leakage for sub-100nm CMOS.pdb |
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| Circuit-level techniques to control gate leakage for sub-100nm CMOS.rb |
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| Circuit-level techniques to control gate leakage for sub-100nm CMOS.chm |
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| Design of a programmable temperature monitoring device for tagging small fish.doc |
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| Design of a programmable temperature monitoring device for tagging small fish.pdf |
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| Design of a programmable temperature monitoring device for tagging small fish.ppt |
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| Design of a programmable temperature monitoring device for tagging small fish.txt |
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| Design of a programmable temperature monitoring device for tagging small fish.lit |
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| Design of a programmable temperature monitoring device for tagging small fish.prc |
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| Design of a programmable temperature monitoring device for tagging small fish.pdb |
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| Design of a programmable temperature monitoring device for tagging small fish.rb |
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| Design of a programmable temperature monitoring device for tagging small fish.chm |
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| Architectural and compiler support for energy reduction in the memory hierarchy of high performance microprocessors.doc |
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| Architectural and compiler support for energy reduction in the memory hierarchy of high performance microprocessors.pdf |
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| Architectural and compiler support for energy reduction in the memory hierarchy of high performance microprocessors.ppt |
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| Architectural and compiler support for energy reduction in the memory hierarchy of high performance microprocessors.txt |
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| Architectural and compiler support for energy reduction in the memory hierarchy of high performance microprocessors.lit |
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| Architectural and compiler support for energy reduction in the memory hierarchy of high performance microprocessors.prc |
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| Architectural and compiler support for energy reduction in the memory hierarchy of high performance microprocessors.pdb |
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| Architectural and compiler support for energy reduction in the memory hierarchy of high performance microprocessors.rb |
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| Architectural and compiler support for energy reduction in the memory hierarchy of high performance microprocessors.chm |
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| Analysis of glitch power dissipation in CMOS ICs.doc |
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| Analysis of glitch power dissipation in CMOS ICs.pdf |
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| Analysis of glitch power dissipation in CMOS ICs.ppt |
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| Analysis of glitch power dissipation in CMOS ICs.txt |
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| Analysis of glitch power dissipation in CMOS ICs.lit |
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| Analysis of glitch power dissipation in CMOS ICs.prc |
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| Analysis of glitch power dissipation in CMOS ICs.pdb |
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| Analysis of glitch power dissipation in CMOS ICs.rb |
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| Analysis of glitch power dissipation in CMOS ICs.chm |
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| Energy-per-cycle estimation at RTL.doc |
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| Energy-per-cycle estimation at RTL.pdf |
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| Energy-per-cycle estimation at RTL.ppt |
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| Energy-per-cycle estimation at RTL.txt |
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| Energy-per-cycle estimation at RTL.lit |
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| Energy-per-cycle estimation at RTL.prc |
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| Energy-per-cycle estimation at RTL.pdb |
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| Energy-per-cycle estimation at RTL.rb |
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| Energy-per-cycle estimation at RTL.chm |
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| A programmable power-efficient decimation filter for software radios.doc |
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| A programmable power-efficient decimation filter for software radios.pdf |
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| A programmable power-efficient decimation filter for software radios.ppt |
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| A programmable power-efficient decimation filter for software radios.txt |
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| A programmable power-efficient decimation filter for software radios.lit |
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| A programmable power-efficient decimation filter for software radios.prc |
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| A programmable power-efficient decimation filter for software radios.pdb |
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| A programmable power-efficient decimation filter for software radios.rb |
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| A programmable power-efficient decimation filter for software radios.chm |
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| Power macro-models for DSP blocks with application to high-level synthesis.doc |
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| Power macro-models for DSP blocks with application to high-level synthesis.pdf |
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| Power macro-models for DSP blocks with application to high-level synthesis.ppt |
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| Power macro-models for DSP blocks with application to high-level synthesis.txt |
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| Power macro-models for DSP blocks with application to high-level synthesis.lit |
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| Power macro-models for DSP blocks with application to high-level synthesis.prc |
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| Power macro-models for DSP blocks with application to high-level synthesis.pdb |
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| Power macro-models for DSP blocks with application to high-level synthesis.rb |
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| Power macro-models for DSP blocks with application to high-level synthesis.chm |
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| An energy efficient TLB design methodology.doc |
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| An energy efficient TLB design methodology.pdf |
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| An energy efficient TLB design methodology.ppt |
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| An energy efficient TLB design methodology.txt |
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| An energy efficient TLB design methodology.lit |
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| An energy efficient TLB design methodology.pdb |
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| An energy efficient TLB design methodology.rb |
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| An energy efficient TLB design methodology.chm |
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| PARE: a power-aware hardware data prefetching engine.doc |
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| PARE: a power-aware hardware data prefetching engine.pdf |
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| PARE: a power-aware hardware data prefetching engine.ppt |
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| PARE: a power-aware hardware data prefetching engine.txt |
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| Memory controller policies for DRAM power management.doc |
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| Memory controller policies for DRAM power management.pdf |
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| Memory controller policies for DRAM power management.ppt |
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| Memory controller policies for DRAM power management.txt |
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| Memory controller policies for DRAM power management.lit |
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| Memory controller policies for DRAM power management.pdb |
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| Memory controller policies for DRAM power management.chm |
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